diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 236a76cfbafd..8f7e5eba8fb9 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -340,7 +340,9 @@ struct nxp_fspi_devtype_data {
 	unsigned int txfifo;
 	unsigned int ahb_buf_size;
 	unsigned int ahb_buf_num;
-	unsigned int rx_clk_mode_max_rate;
+	unsigned int rx_clk_mode0_max_rate;
+	unsigned int rx_clk_mode1_max_rate;
+	unsigned int rx_clk_mode3_max_rate;
 	unsigned int quirks;
 	unsigned int lut_num;
 	bool little_endian;
@@ -351,7 +353,8 @@ static struct nxp_fspi_devtype_data lx2160a_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode0_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = FSPI_QUIRK_DISABLE_DTR,
 	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
@@ -362,7 +365,8 @@ static struct nxp_fspi_devtype_data imx8mm_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode0_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = 0,
 	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
@@ -373,7 +377,8 @@ static struct nxp_fspi_devtype_data imx8qxp_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode0_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = 0,
 	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
@@ -384,7 +389,8 @@ static struct nxp_fspi_devtype_data imx8dxl_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode0_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = FSPI_QUIRK_USE_IP_ONLY,
 	.lut_num = 32,
 	.little_endian = true,  /* little-endian    */
@@ -395,7 +401,8 @@ static struct nxp_fspi_devtype_data imx8ulp_data = {
 	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
 	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode0_max_rate = 66000000, /* 66 MHz    */
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = 0,
 	.lut_num = 16,
 	.little_endian = true,  /* little-endian    */
@@ -406,7 +413,9 @@ static struct nxp_fspi_devtype_data imxrt1050_data = {
 	.txfifo = SZ_128,
 	.ahb_buf_size = SZ_1K,
 	.ahb_buf_num = 4,
-	.rx_clk_mode_max_rate = 60000000, /* 60 MHz    */
+	.rx_clk_mode0_max_rate = 60000000, /* 60 MHz    */
+	.rx_clk_mode1_max_rate = 133000000,/* 133 MHz	*/
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = 0,
 	.lut_num = 16,
 	.little_endian = true,  /* little-endian    */
@@ -417,7 +426,9 @@ static struct nxp_fspi_devtype_data imxrt1170_data = {
 	.txfifo = SZ_256,
 	.ahb_buf_size = SZ_4K,
 	.ahb_buf_num = 8,
-	.rx_clk_mode_max_rate = 60000000, /* 60 MHz    */
+	.rx_clk_mode0_max_rate = 60000000, /* 60 MHz    */
+	.rx_clk_mode1_max_rate = 133000000,/* 133 MHz	*/
+	.rx_clk_mode3_max_rate = 166000000,/* 166 MHz	*/
 	.quirks = 0,
 	.lut_num = 16,
 	.little_endian = true,  /* little-endian    */
@@ -736,16 +747,18 @@ static void nxp_fspi_select_rx_sample_clk_source(struct nxp_fspi *f,
 		reg |= FSPI_MCR0_RXCLKSRC(3);
 		fspi_writel(f, reg, f->iobase + FSPI_MCR0);
 		f->flags |= FSPI_RXCLKSRC_3;
-		f->support_max_rate = 166000000;
+		f->support_max_rate = f->devtype_data->rx_clk_mode3_max_rate;;
 	} else {
 		reg = fspi_readl(f, f->iobase + FSPI_MCR0);
 		reg &= ~FSPI_MCR0_RXCLKSRC(3);	/* select mode 0 */
 		if (f->rx_clk_preferred_mode == LOOPBACK_FROM_DQS) {
 			reg |= FSPI_MCR0_RXCLKSRC(1);  /* select mode 1 */
+			f->support_max_rate = f->devtype_data->rx_clk_mode1_max_rate;
+		} else {
+			f->support_max_rate = f->devtype_data->rx_clk_mode0_max_rate;
 		}
 		fspi_writel(f, reg, f->iobase + FSPI_MCR0);
 		f->flags &= ~FSPI_RXCLKSRC_3;
-		f->support_max_rate = f->devtype_data->rx_clk_mode_max_rate;
 	}
 }
 
@@ -1504,7 +1517,6 @@ static int nxp_fspi_probe(struct platform_device *pdev)
 	f->rx_clk_preferred_mode = LOOPBACK_INTERNALLY;
 	if (of_property_read_bool(np, "nxp-flexspi,rx-clk-loopback-from-dqs")) {
 		f->rx_clk_preferred_mode = LOOPBACK_FROM_DQS;
-		f->devtype_data->rx_clk_mode_max_rate = 132000000;
 	}
 
 	mutex_init(&f->lock);